Higher data transmission rates, smaller devices, and shorter communication distances have made cellular circuit design a complex, multi-faceted task. One of the most prevalent challenges designers face is keeping up with signal integrity demands.
High-speed signals are susceptible to discontinuities, impedance mismatches, sharp bends, and other interruptions that can cause them to deteriorate quickly, undermining device operation. As a designer, achieving optimal signal integrity requires you to pay careful attention to the placement and layout of your components, their interconnectedness, and the electrical characteristics of your materials.
This article discusses common signal integrity issues encountered when designing for cellular IoT and provides practical solutions. But first, let’s define and explain what signal integrity is.
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What is signal integrity?
All digital signals are fundamentally analog and are subject to noise, distortion, and loss. Low-frequency signals traveling over short distances typically transmit with sufficient fidelity. However, as the bit rate and distance increase, the signal gradually degrades to a point where errors occur and the device fails.
Signal integrity is the ability of an electrical signal to move from the driver to the receiver through a transmission medium without distortion. It is a crucial factor in cellular IoT device design, where high data transfer speeds are becoming increasingly common. The device will deliver optimum performance when high-frequency signals can travel through a cellular link without attenuation or distortion.
The importance of signal integrity in IoT device design
The Internet of Things (IoT) is a rapidly growing technology, with cellular IoT devices providing an increasing part of the technology solutions. However, designers must pay particular attention to signal integrity when designing cellular IoT device circuits. High-speed signals are heavily impacted by noise, crosstalk, and impedance mismatches, all of which reduce signal quality.
Below are 5 primary reasons signal integrity is essential in cellular IoT device design.
1. Low power consumption:
High-frequency signals require less power than low-frequency signals. Signal integrity ensures that high-speed signals can transmit without distortion.
2. Device reliability:
Properly designed high-speed circuits suffer less interference due to signal integrity issues. This results in more reliable cellular IoT devices that can perform better and last longer.
3. Data Integrity:
Signal integrity is essential for cellular IoT devices because it ensures accurate, reliable data transmission over cellular networks. Optimum signal integrity minimizes the possibility of errors in communication and data transmission.
4. Cost-savings:
Maximizing signal integrity can mitigate the risk of costly redesigns or repairs. A cellular IoT device design supported by the right signal integrity consideration results in fewer problems and less reworking.
5. Compliance:
Adequate signal integrity increases the chances of the final product passing compliance tests and meeting the requirements for various certifications and standards.
Common signal integrity issues when designing for IoT
If your circuit design only includes low-speed signals, you do not have to worry about signal integrity issues. However, if you are dealing with high-speed designs, you will likely have distorted signals due to shorter rise time requirements. At high frequencies, problems like reflections, ringing, crosstalk, signal attenuation, propagation delays, and signal skews can severely undermine the quality of your design.
1. Reflections:
Reflections occur when the transmission line impedance differs from the load’s impedance. This difference causes a portion of the signal to be reflected to the source, resulting in a distorted signal at the receiver.
2. Ringing, overshoot, and undershoot:
Ringing is a process in which an undesired voltage or current signal oscillation occurs due to the signal reflection in a circuit board trace. If the value of the transmitted signal is more than the actual value in an ascending signal, then an overshoot occurs. Similarly, when the transmitted signal is lower than the value in a descending signal, then undershoot occurs. All these processes distort the transmitted signal in a circuit.
3. Crosstalk:
In designs where signals travel at high speeds, signals routed close to each other can influence each other in undesired ways. This occurrence is known as crosstalk and can lead to substantial data loss.
4. Signal attenuation:
Signals traveling across traces can suffer decreased intensity due to electrical resistance. Attenuation can lead to data loss if not addressed through proper design considerations.
5. Propagation delays:
When designing cellular IoT devices, designers must consider the time it takes for a signal to travel from one point of an electronic device to another. Propagation delays can cause inaccurate timing between the transmission and reception of signals, resulting in data integrity issues in cellular IoT devices.
6. Ground bounce or simultaneous switching noise:
Ground bounce occurs when the ground reference of a circuit is noisy due to the large current draw of multiple components switching simultaneously. This noise can degrade the signal integrity and cause undesired errors.
IoT design guidelines for improving signal integrity
The most reliable way to maximize signal integrity when designing for IoT is to place and route circuit boards using criteria that deliver the best environment for high-speed signal transmission. Here are 5 guidelines to consider to improve signal integrity in your cellular IoT device design.
1. Stackup definition
The first thing to look at in your high-frequency circuit design is the board stackup. The board stackup defines the layers and materials used in a printed circuit board. Common stackups consist of copper-filled microvias, core material, prepregs, and copper foils.
Choose the stackup and materials that offer the most efficient signal transmission. The substrate is a particularly critical component of the assembly. Plan its specifications carefully to avoid excessive electromagnetic emissions, impedance discontinuities, and signal coupling.
Besides picking the right materials, keep the recommendations below in mind when looking at the board stackup of your next design.
- Ensure all signal layers are coupled to an uninterrupted reference plane. A reliable reference plane provides a clear return path and eliminates broadside crosstalk.
- Provide substantial planar capacitance to minimize AC impedance at high frequencies. Closely coupled planes reduce impedance at the top end and dramatically minimize electromagnetic radiation.
- Route high-speed signals between planes to reduce radiation.
- Reduce the dielectric height to minimize crosstalk without negatively impacting the available space on the circuit board.
2. Routing and workflows
With a carefully laid-out board stackup, you can start thinking about routing your board. Accurately configuring your design rules and workspace will enable you to route your board in the most efficient way possible.
Use the pointers below to make routing your board easier and avoid signal quality issues.
- Simplify your design view to view split planes and current return paths easily. Start by determining the copper plane (ground or power) that references each layer. Then, turn on the signal and plane layers to view them simultaneously, so you can easily see traces crossing split planes.
- When routing traces, it is best to avoid placing them parallel and broadside, as this causes crosstalk.
- Shorten parallel trace segments as much as possible to minimize crosstalk. Also, space the signal groups so that the address and data spacing are 3 times the trace width.
- Beware of trace crosstalk from nearby layers that can cause signal integrity problems when using buildup microstrip routing on the top and bottom of your board.
- Route the clock to the longest delay of the signal group to allow the data to settle before the clock reads it.
- Route signals between planes to minimize radiated emissions and protect them from electrostatic discharges.
3. Impedance matching
Impedance matching means adjusting the input or output impedance of a device to a value that maximizes power transfer and minimizes signal reflection. Impedance matching is needed in cellular IoT device design to prevent reflections when signals propagate along an interconnect. When the interconnect and the input impedance are mismatched, a reflection will occur at the interface between them.
The characteristic impedance of your design may be inconsistent for various reasons, the most common being faulty transmission lines. Other influential factors include:
- Circuit trace thickness
- Insulator thickness and,
- Prepreg around the circuit trace dielectric values
When designing a board for signal propagation, you can match impedance by finding the proper coupling between the properties of the substrate and the size and position of the board traces. For matched impedance, the intensity of the signal along any given trace remains within predetermined limits. A better coupling will result in a more robust, high-integrity signal.
Below are 4 additional tips for obtaining a suitable impedance coupling.
- Choose the right dielectrics: IoT manufacturers use dielectrics in circuit boards for insulation. The characteristic impedance of the board is directly proportional to the width of the dielectric material, and the larger the width, the higher the impedance value. The dielectric constant typically varies with frequency, but you can minimize variations in high-frequency operations by choosing dielectric material with a consistent, constant value.
- Prevent crossing traces across split planes: Crossing traces across split planes can significantly undermine signal integrity. A better alternative is using stitching capacitors. These provide a more conducive return path for the current, reducing the current loop area and providing better impedance control.
- Consider prepreg limitations: The prepreg (short for pre-impregnated) is applicable when fusing etched cores. Experts recommend using at most three different types of prepreg during a core stackup. Each layer must be less than 10 millimeters to avoid thickness variation.
- Use a secure impedance calculator: Calculating the impedance level is crucial in several stages of IoT device design. The impedance value equation involves a series of tiring complex equations, so using an online calculator can save you significant time and help you avoid costly errors.
4. Reducing electromagnetic interference (EMI)
EMI is interference caused by the electric and magnetic fields from electronic devices. It may emanate from internal circuits and components or nearby devices. The long traces on circuit boards usually act like receivers and transmitters of unwanted signals. Long high-speed routes also receive interference from nearby devices.
High EMI levels degrade signal quality and affect the device’s operation. They also undermine the device’s chances of passing tests relating to electromagnetic compatibility (EMC). Therefore, when designing for IoT, it is necessary to ensure the signals passing through the printed circuit boards offer maximum immunity against electromagnetic interference from both internal and external sources.
Here are 5 effective ways to reduce the EMI levels in cellular IoT device design:
- Use EMI shielding techniques: Shielding techniques such as metallic enclosures, multi-layer boards, and filters can help reduce interference levels. Use circuit boards with multiple layers and ground planes to separate signals and reduce interference.
- Use shielding gaskets: Shielding gaskets provide a protective boundary between the outside environment and the device’s internal circuits. They also help reduce EMI levels emanating from other components on the board.
- Optimize trace length and width: Keep trace length at a minimum to reduce crosstalk-related EMI. Also, use thick signal traces to minimize noise and high-frequency losses.
- Optimize signal termination: Unterminated or mismatched terminations can cause signal reflections, resulting in higher EMI levels. So, terminate all signals with the correct impedance value and check for any open or short circuits.
- Design for low-noise: Use components with low noise levels and reduce power supply fluctuations to minimize EMI.
5. Testing for signal integrity
Once your design is complete, you must test it for optimal performance. Most cellular IoT device designs require testing for signal integrity and electromagnetic compatibility. This involves checking the signals passing through the printed circuit boards to ensure they are free of any EMI/RFI, crosstalk, reflections, and other noise. Signal integrity testing also includes time domain reflectometry (TDR) measurements to check if the impedance is as expected throughout the trace paths.
You can test your board’s signal integrity by using simulation tools such as Altium Designer, Keysight ADS, and Mentor Graphics HyperLynx. These tools help you visualize the behavior of signals, identify any issues that can cause signal degradation or data loss, and generate a comprehensive report with all the details.
Consider the aspects below when testing your IoT device for signal integrity.
- Trace length: Check if the signal trace lengths are as short as possible.
- Impedance value: Calculate the impedance values for all signals and match them with the expected values.
- Crosstalk: Check for crosstalk between adjacent trace paths.
- Reflections/Noise: Measure the reflections/noise levels and ensure they are within the expected values.
- EMI/RFI: Measure the electromagnetic interference and radio frequency interference (EMI/RFI) present in the circuit board and check that it is within acceptable limits.
Overcome signal integrity issues with proper IoT device design
Recent technological advancements have dramatically increased digital signal frequencies for many types of electronic circuits. This trend is expected to continue, with transmission data rates of 1 Gbps or higher becoming the norm in future cellular IoT applications.
However, faster data rates come with challenges for maintaining signal integrity. Designers need to pay close attention to the trace length, impedance value, crosstalk levels, reflections/noise levels, and EMI/RFI levels to ensure that the signals passing through their printed circuit boards remain free from any errors or losses.
Preventing signal integrity problems in high-speed design is all about having the right stackup, layout, and routing. By following the tips and recommendations above, you can improve the signal integrity of your IoT design and create efficient cellular devices with minimal interference.
Want to learn more about improving signal integrity? Contact an Onomondo expert.
